Method in connection with serial data transfer to recognize a fixed pattern

ABSTRACT

The present invention relates to a method in connection with serial data, to recognize a frame synchronization pattern, and for the sake of providing a fast and reliable search algorithm especially for V.110 synchronization pattern, the present invention suggests a method characterized by examining two successive bytes by performing a binary AND operation between the first byte and a check byte made up from the value of the second byte, examining if the AND operation is zero for thereby establishing whether said first byte and second byte qualify as candidates for the synchronization pattern, and further verifying said candidates by checking further criteria given by the frame in question.

FIELD OF THE INVENTION

The present invention relates to a method in connection with serial datatransfer to recognize a fixed synchronization bit pattern.

Although the present invention has been developed in connection with theV.110 protocol, it is to be understood that the general principle of theinvention can also find its application in connection with similarsystems.

BACKGROUND OF THE INVENTION

For serial data transfer with rate adaption a commonly used protocol isthe V.110. When developing equipment for this protocol one will be facedto the problem of how to recognize the V.110 frame synchronizationpattern. One can choose to solve it either in hardware, software or by acombination of both hardware and software. Often the hardware solutionis preferred because the software alternative is considered to take toomuch of the CPU-capacity. However, with the present algorithm thesync-detection is quite easy to handle in software. Compared to the restof the V.110 processing that usually is done in software, this extraload is very small.

Before the present method or algorithm is described, reference should bemade to FIG. 1 illustrating how the 80 bits V.110 frame appears. Octetzero contains all binary 0, whilst octet 5 consist of binary 1 followedby seven E bits. Octets 1-4 and 6-9 contain a binary 1 in bit numberone, a status bit (S- or X-bit) in bit number 8 and six data bits(D-bits) in bit positions 2-7. The order of bit transmission is fromleft to right and top to bottom.

The 17 frame synchronization bits (*) consist of all eight bits set tobinary 0 in octet zero and a binary 1 in bit position 1 in the followingnine octets. Through this document special attention should be focusedon these synchronization bits (*)

At a first glimpse the finding of the synchronization pattern may beconsidered as quite easy. This would, it is true, obviously be easy ifthe ten octets always arrive byte-aligned in the computer memory inquestion. But here is where the problem starts.

When the serial bit stream “ticks” into the receive-buffer in thecomputer memory, one has no guarantee that the octets in the frame fallinto corresponding byte-addressable locations.

FIG. 2 illustrates how odd the serial bit stream may arrive in abyte-addressable computer memory store. Consequently, the V.110 frameoctets included in the bit stream appearing in FIG. 2 will notnecessarily be byte-aligned as compared with FIG. 1. Hence, each octetmay be split between or partly cover two consecutive addresses asregards byte-alignment.

PRIOR ART

From U.S. Pat. No. 5,204,883 (Blanc) there is known a method and anapparatus for recognition of a framing pattern distributed in a serialbit stream. The framing pattern comprises M single bits distributed atintervals of a fixed number, N of bits, as measured from the start ofone framing bit to the start of the next, in an incoming serial bitstream. The prior art system makes a computation following eachreception of an arbitrary group of N incoming data, and will after aminimum number of computation steps to distinguish between a ‘lookalike’ framing pattern and a ‘true’ framing pattern, point out with noambiguity the very position of the ‘true’ pattern within the bit stream,thus allowing synchronization over that stream.

This prior art describes a method for synchronizing in relation to a bitpattern, wherein each individual bit in the pattern is distributed withrandomly arranged user data therebetween.

However, this prior art technique is silent about finding a bit patternwhich is not “bit-distributed”, and would consequently not be able touse for the recognition of such bit patterns.

U.S. Pat. No. 5,177,738 (Dell'Oro et al.) discloses a process and amonolithically integrated device for speed adaption for integratedservices digital networks (ISDN), which process relates to synchronizingand decomposing asynchronous data frames of different lengths of aserial bit stream structured in octet-rows of bits containing framesynchronization bits and data bits, for rate adaption of synchronous andasynchronous terminals of said ISDN during data reception from saidnetwork.

EP 0 727 886-A2 (Anderson/Wandel & Golterman Technologies Inc.)discloses a method related to digital data sequence pattern filtering,which method is octet/byte oriented. In practice this will involve thatthe method is operated on a byte stream, and that a byte alignement canbe assumed.

However, this prior art does not give any instructions about a methodrelated to a bit stream, let alone any solution to the problem enfacedwith not being byte aligned in relation to the bit pattern to berecognized.

U.S. Pat. No. 5,412,754 (Newley et al.) relates to a pattern recognizingsystem, comprising a transmitter and receiver for transmitting andreceiving a serial stream of bits that includes data bits and apredetermined bit pattern, the system being adapted for recognizing saidbit pattern. The system checks each received bit and compares this withthe state value of previous bits until the predetermined bit pattern isrecognized. This system is a slow system since it requires a comparisonor checking operation for each received bit. In other words, this systemis silent about conducting a comparison or checking operation only foreach 8th received bit.

U.S. Pat. No. 5,412,610 (Suzuki) relates to a serial data transferdevice, wherein serial data are transfered to/from an FIFO buffer.However, there is no information in this publication concerning how aspecial bit pattern can be recognized in such a buffer, for example datawhich have been received from a serial communication link.

In conclusion, none of the cited references give any instructionsregarding how to recognize a synchronization pattern in a frameaccording to V.110 protocol, let alone that this recognition can beeffected by a fast search algorithm for such V.110 synchronizationpattern.

SUMMARY OF THE INVENTION

The main object of the present invention is to provide a fast searchalgorithm for V.110 synchronization pattern.

It is also an object of the invention to provide a fast search algorithmfor a FAX application in which the aim is to recognize eleven zeros (0)followed by a single one (1) in a bit stream (known as EOL, i.e.End-Of-Line).

Another object of the present invention is to provide an appropriateCheckBitMaskTable to be used in connection with such a fast searchalgorithm.

A further object of the present invention is to provide an algorithm inwhich two arbitrary bit groups or bytes are compared with each other andthe result thereof compared with further criteria given by the V.110frame.

Still another object of the present invention is to provide an algorithmwhich is easy to handle in software, and which represents only a verysmall load compared with the related processing in software.

Yet another object of the invention is to provide an algorithm forfinding a bit pattern which is not bit distributed.

A still further object of the invention is to provide an algorithmconducting a comparison or checking operation only for each 8th receivedbit in a bit stream and thereby increasing the speed at which thealgorithm can operate.

BRIEF DISCLOSURE OF THE INVENTION

The above objects are achieved in connection with a method as stated inthe preamble, which according to the invention is characterized byexamining two successive elements, by performing a binary AND operationbetween the first element and a check element made up from the secondelement, then examining if the binary AND operation is zero forthereafter establishing whether said first element and second elementqualify as candidates for the synchronization pattern, and furtherverifying said candidates by checking further criteria given by theframe in question.

Further features and advantages given by the present invention willappear from the following description taken in conjunction with theenclosed drawings and appendices, as well as from the enclosed patentclaims.

BRIEF DISCLOSURE OF THE DRAWINGS AND APPENDICES

FIG. 1 shows the layout of a 80 bits CCITT V.110 frame. Note the bitnumbering scheme used as compared to FIG. 2. When referring octets inV.110 frames the bits are normally numbered 1 through 8 from left toright. The bits in a byte are numbered 0 through 7 starting from rightto left as in FIG. 2. The asterisks (*) mark out the framesynchronization bits.

FIG. 2 is a table illustrating the arbitrary serial bit stream as it mayhave been received into a buffer in a computers memory. Note theasterisks (*) and how odd the octets are aligned with respects to thebyte addressable buffer.

Appendix A illustrates an embodiment of a CheckBitMask table, which canbe used to generate the check value used in connection with the methodaccording to the invention. An entry in the table is a CheckBitMask.

Appendix B is a print out of a computer program which can be used forrealizing the method according to the present invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

As explained previously in connection with FIG. 1, a V.110 framesynchronization pattern appears as 80 bits, one frame always startingwith 8 zero (0) bits followed by a one (1) bit. As illustrated in FIG. 2the serial bit stream may have a sequential but arbitrary position inthe byte-addressable locations, and an embodiment of the present methodwill be explained in connection with such an arbitrary location in abuffer/array.

While still referring to FIG. 2 the following assumptions should beobserved.

The received bit stream is stored in a byte-addressable buffer/array.

The bytes in the buffer are filled from left to right when the bits areticking in from the serial line, it here being assumed that the mostsignificant bits (MSB) are received first. However, the leastsignificant bits (LSB) can be used as well, but the check byte(explained later) would then have to be mirrored.

When the above assumptions are fulfilled, an embodiment of the presentinvention may comprise the following steps for each received byte to beexamined:

1. Check the byte in question by doing a binary AND operation betweenthe examined byte (in Appendix B program listing “current byte”) and aspecial check byte. The check byte (retrieved from the CheckBitMasktable) is to have the same number of leading zero bits as there areleading zero bits in the byte that follows the byte in question (inAppendix B program listing, “next byte”. The rest of the bits in thischeck byte has to be set to ones (1″s).

2. If the result of the AND operation is zero and the byte that followsthe byte in question is not zero itself, then 8 consecutive zero (0)bits followed by at least one one (1) bit have been found.

The following example making references to FIG. 2 may better explain howit works. During the example the notation byte0, byte1, byte2 and so onrefer to the bytes at respective memory offset 0, 1, 2 and so on:

If byte0 should be a candidate for the start of the eight consecutivezero bits, bit b0 through b5 have to be zero since byte1 that followsbyte0 contains only 2 leading zero bits (b7 and b6).

A binary AND with byte0 and a byte that has only 2 leading zeros and therest of the bits set to ones (1's), will give result zero if byte0 is acandidate: $\begin{matrix}01010000 \\{{AND}\quad 00111111} \\{{= 00010000}\quad}\end{matrix}\begin{matrix}\quad \\\quad \\{\quad \left. {{non}\text{-}{zero}\quad {result}}\rightarrow{\underset{\_}{byte0}\quad {is}\quad {not}\quad a\quad {candidate}} \right.}\end{matrix}$

If byte1 should be a candidate for the start of the eight consecutivezero bits, bit b0 through b3 have to be zero since byte2 contains fourleading zero bits (b7 through b4).

A binary AND with byte1 and a byte that has four leading zeros and therest of the bits set to ones (1's), will give result zero if byte1 is acandidate: $\begin{matrix}00110000 \\{{AND}\quad 00001111} \\{{= 00000000}\quad}\end{matrix}\begin{matrix}\quad \\\quad \\\left. {{zero}\quad {result}}\rightarrow{\underset{\_}{byte1}\quad {is}\quad a\quad {candidate}} \right.\end{matrix}$

Eight consecutive zero (0) bits have been found. The first four arefound in byte1 bit b3-b0 and the rest follow in the byte2 bit b7-b4.Since byte2 is non-zero the first sync bit that is set (bit 8 in octet1FIG. 1) must be contained in byte2 at bit position b3. But since b3 isnot set in all eight bytes byte3 . . . byte8, byte1 can not be part ofthe sync pattern, thus continue checking byte2.

The binary AND with byte2 and a byte that has 8 leading zeros (samenumber of leading zeros as in byte3) will always give zero result, butsince byte3 is zero itself the 8 consecutive zero bits followed by a one(1) bit can not start within byte2, thus byte2 is discarded too.

Continuing binary AND'ing byte3 with a byte that has 2 leading zeros(same number of leading zeros as in byte4) give zero result, thus wemust check the remaining ones (1) sync bits. Since first leading one (1)bit in byte4 is found at bit position b5, bit b5 has to be checked inthe remaining bytes byte5 . . . byte12. Since such b5 positions are allset in these bytes, a valid start has been found.

Appendix B shows a C-implementation of the algorithm above.

APPENDIX A CheckBitMaskTable Entry Binary number contents 000 00000000001 00000001 002 00000011 003 00000011 004 00000111 005 00000111 00600000111 007 00000111 008 00001111 009 00001111 010 00001111 01100001111 012 00001111 013 00001111 014 00001111 015 00001111 01600011111 017 00011111 018 00011111 019 00011111 020 00011111 02100011111 022 00011111 023 00011111 024 00011111 025 00011111 02600011111 027 00011111 028 00011111 029 00011111 030 00011111 03100011111 032 00111111 033 00111111 034 00111111 035 00111111 03600111111 037 00111111 038 00111111 039 00111111 040 00111111 04100111111 042 00111111 043 00111111 044 00111111 045 00111111 04600111111 047 00111111 048 00111111 049 00111111 050 00111111 05100111111 052 00111111 053 00111111 054 00111111 055 00111111 05600111111 057 00111111 058 00111111 059 00111111 060 00111111 06100111111 062 00111111 063 00111111 064 01111111 065 01111111 06601111111 067 01111111 068 01111111 069 01111111 070 01111111 07101111111 072 01111111 073 01111111 074 01111111 075 01111111 07601111111 077 01111111 078 01111111 079 01111111 080 01111111 08101111111 082 01111111 083 01111111 084 01111111 085 01111111 08601111111 087 01111111 088 01111111 089 01111111 090 01111111 09101111111 092 01111111 093 01111111 094 01111111 095 01111111 09601111111 097 01111111 098 01111111 099 01111111 100 01111111 10101111111 102 01111111 103 01111111 104 01111111 105 01111111 10601111111 107 01111111 108 01111111 109 01111111 110 01111111 11101111111 112 01111111 113 01111111 114 01111111 115 01111111 11601111111 117 01111111 118 01111111 119 01111111 120 01111111 12101111111 122 01111111 123 01111111 124 01111111 125 01111111 12601111111 127 01111111 128 11111111 129 11111111 130 11111111 13111111111 132 11111111 133 11111111 134 11111111 135 11111111 13611111111 137 11111111 138 11111111 139 11111111 140 11111111 14111111111 142 11111111 143 11111111 144 11111111 145 11111111 14611111111 147 11111111 148 11111111 149 11111111 150 11111111 15111111111 152 11111111 153 11111111 154 11111111 155 11111111 15611111111 157 11111111 158 11111111 159 11111111 160 11111111 16111111111 162 11111111 163 11111111 164 11111111 165 11111111 16611111111 167 11111111 168 11111111 169 11111111 170 11111111 17111111111 172 11111111 173 11111111 174 11111111 175 11111111 17611111111 177 11111111 178 11111111 179 11111111 180 11111111 18111111111 182 11111111 183 11111111 184 11111111 185 11111111 18611111111 187 11111111 188 11111111 189 11111111 190 11111111 19111111111 192 11111111 193 11111111 194 11111111 195 11111111 19611111111 197 11111111 198 11111111 199 11111111 200 11111111 20111111111 202 11111111 203 11111111 204 11111111 205 11111111 20611111111 207 11111111 208 11111111 209 11111111 210 11111111 21111111111 212 11111111 213 11111111 214 11111111 215 11111111 21611111111 217 11111111 218 11111111 219 11111111 220 11111111 22111111111 222 11111111 223 11111111 224 11111111 225 11111111 22611111111 227 11111111 228 11111111 229 11111111 230 11111111 23111111111 232 11111111 233 11111111 234 11111111 235 11111111 23611111111 237 11111111 238 11111111 239 11111111 240 11111111 24111111111 242 11111111 243 11111111 244 11111111 245 11111111 24611111111 247 11111111 248 11111111 249 11111111 250 11111111 25111111111 252 11111111 253 11111111 254 11111111 255 11111111

APPENDIX B/************************************************************************ *  * Routine: V110SyncSearch  *  * Description: Search through an arrayin order to find a correct V.110  * frame synchronization pattern. Ifroutine return  * an error free frame has been found. Note thatRxSynBitPos  * return bit positions within 1-8. 1 correspond to bit 0,LSB  * and 8 means bit 7 MSB within a byte.  * Also note that thisroutine expects the serial stream to  * fill the bytes from MSB towardsLSB before moving to next  * byte. That means MSB is sent/receivedfirst.  * Input and output are passed using global variables.  *  *  *Input: unsigned char  RxDataStream[ ] Array containing received  * bitstream  * unsigned char *RxSyncByte Pointer where to start  * searching * unsigned int  BytesInRxDataStream Number of received bytes  *  *Output: unsigned char *RxSyncByte Points at start of frame  * if anyfound  * unsigned char RxSyncBitPos Bit position within  * RxSyncByte atwhere frame  * begin if any found  * unsigned int BytesInRxDataStreamNumber of bytes left in  * serial stream  *  *  * Return: = 0 : Syncerror-free frame found, RxSyncByte and  * RxSyncBitPos tells where theframe is located  * < > 0: No start of frame found  *  *  * Copyright:Ericsson AS  *  * Written: 1996-09-25 Bjoern Birkeland  *  * ***********************************************************************/int V110SyncSearch(void) { /* Define look up table for V.110synchronization search */ static const struct SYNCTEST_STRSyncTestTable[256] = { {0×00,0×08}, {0×01,0×01}, {0×03,0×02},{0×03,0×02}, {0×07,0×03}, {0×07,0×03}, {0×07,0×03}, {0×07,0×03},{0×0F,0×04}, {0×0F,0×04}, {0×0F,0×04}, {0×0F,0×04}, {0×0F,0×04},{0×0F,0×04}, {0×0F,0×04}, {0×0F,0×04}, {0×1F,0×05}, {0×1F,0×05},{0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05},{0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05},{0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05}, {0×1F,0×05}, {0×3F,0×06},{0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06},{0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06},{0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06},{0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06},{0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06},{0×3F,0×06}, {0×3F,0×0G}, {0×3F,0×06}, {0×3F,0×06}, {0×3F,0×06},{0×3F,0×06}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07}, {0×7F,0×07},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08},{0×FF,0×08}, {0×FF,0×08}, {0×FF,0×08} unsigned char *current_byte;unsigned char *next_byte; unsigned char *tmp_byte; unsigned int sync_errors; unsigned char  chk_bit; struct SYNCTEST_STR  sync_test;current_byte = RxSyncByte; do { sync_errors = 17; next byte =current_byte+1; /* Check for buffer-wrap around condition */ if (nextbyte > &RxDataStream[ RX_BUF_SIZE−1]) { next_byte = &RxDataStream[ 0 ];} /* Look up check byte and bit position */ sync_test = SyncTestTable[*next_byte]; /* Check current byte */ if (!(*current_byte &sync_test.check byte)){ /* Yes, enough zero bits found, check that */ /*next byte contains a one(1) bit:  */ if (*next_byte){ /* Yes it did, nowcheck that the remaining */ /* eight sync bits are set to binary 1:  */tmp_byte = next_byte; sync_errors = 9; chk_bit =(1<<(sync_test.bit_pos−1)); do { if (tmp_byte==&RxDataStream[RX_BUF_SIZE−1]){ tmp_byte = &RxDataStream[ 0 ]; } else { tmp_byte++; }/* Leave loop at first sync bit that is not set, or */ /* whensync_errors has counted down to zero  */ } while((*tmp_byte & chk_bit)&& (--sync_errors)); /* Did sync_errors reach zero? */ if(!sync_errors){ /* Yes, error free frame! Update new sync position */ /*and return with “no sync errors”    */ RxSyncByte = current_byte;RxSyncBitPos = sync_test.bit_pos; return(sync_errors); } } }current_byte = next_byte; } while ((--BytesInRxDataStream >V110_FRAME_SIZE) && sync_errors); return(sync_errors); }

What is claimed is:
 1. A method for detecting a fixed bit pattern inserial data stored as successive non-aligned byte elements in a buffer,comprising the steps of: performing an AND bit operation between a firstbyte element and a check element computed from a second byte elementimmediately following the first element; and examining the results ofthe AND bit operation for thereafter establishing whether said firstbyte element and second byte element qualify as candidates for thepattern given by aligned successive byte elements.
 2. A method asclaimed in claim 1, comprising the following steps: examining a firstbyte in a buffer in which a bit stream of said serial data has beenreceived; examining a second byte following said first byte; computing acheck byte based on said second byte; performing a binary AND operationbetween values of said first byte and said check byte; examining saidAND operation to check whether 8 consecutive zero bits are found;examining the bit position of a first ‘1’ bit in said second byte; andchecking corresponding ‘1’ bit positions In each remaining byte,respectively, to verify correct synchronization pattern.
 3. A method asclaimed in claim 1, comprising the following steps: initializing a firstpointer to point at a first byte in a buffer, that might contain thestart of a frame; initializing a second pointer to point at the nextbyte that follows the byte at which the first pointer point; using thevalue of the byte at which the second pointer points, to look up theCheckBitMask from a CheckBitMask Table array; effecting a binary ANDoperation of the value of the byte at which the first pointer pointswith the value of the CheckBitMask found in CheckBitMaskTable, and checkwhether result is zero; if result is not zero, discarding the byte atwhich the first pointer points and advancing the first pointer to thenext byte to be examined, and advancing the second pointer to the nextbyte in the buffer; if more bytes exist in the buffer then use the valueof the byte at which the second pointer points, else terminate searchwith no hit; and if the second pointer points at a zero byte thendiscarding said byte, else checking whether at least 8 consecutive zerobits (0's) followed by a one bit (‘1’) is found.
 4. A method as claimedin claim 3, further comprising checking whether the next eight bytescontain a one bit (>1′) at the same bit-position as the left-most onebit (>1′) in the byte at which the second pointer points, for therebyverifying that a correct synchronizaton pattern has been found.
 5. Amethod as claimed in claim 1, wherein the check element obtained using aCheckBitMask Table having 256 entries, each of which containing aCheckBitMask which is a 8-bit wide pattern, and each entry containing apattern made up of leading zero bits (‘0’bits) corresponding to leadingzero bits (>0′-bits) in the entry's position number itself, whereas therest of the entry's bits are set to one bit (>1′-bits), respectively. 6.A method as claimed in claim 1, wherein the check element is obtainedusing a CheckBitMask table adapted to be used in connection with bitstreams wherein the most significant bits (MSB) are received first.
 7. Amethod as claimed claim 1, wherein the check element is obtained using aCheckBitMask Table adapted to be used in connection with bit streamswherein the least significant bits (LSB) are received first.
 8. Aniterative method of detecting a fixed bit pattern in serial data storedas non-aligned bit patterns in a buffer, the buffer comprising aplurality of logically sequential bytes, comprising the steps of:performing a bitwise AND operation between a first byte and a check bytecomputed from a second byte immediately following the first byte, thecheck byte consisting of the same number of leading zero bits as thesecond byte, and the remainder of the bits set to 1; and if the bitwiseAND operation yields a zero byte, then successively checking the bit inthe column corresponding to the most significant 1 in the check bytecomputed from the second byte to determine whether the bits match thepattern.
 9. In a memory structure comprising M columns and N rows, aniterative method of detecting a fixed bit pattern in serial data, thefixed bit pattern comprising M successive ‘0’ bits followed by Z rowsbeginning with a A1″, comprising the steps of: initializing a firstpointer to point at a first row in a buffer; initializing a secondpointer to point at the mw following the current-row; retrieving aCheckBitMask corresponding to the value of binary data stored in the rowidentified by the second pointer; performing a binary AND operation ofthe current-row with the value of the CheckBitMask; and if result of thebinary AND operation is not zero, advancing the first pointer and thesecond pointer one row in the memory structure.
 10. A method accordingto claim 9, further comprising the step of: if the result of the binaryAND operation is zero, then examining the Z-1 rows following thecurrent-row to determine whether the serial data corresponds to thefixed bit pattern.
 11. A method according to claim 10, wherein examiningthe Z-1 rows following the current row comprises sequentially checkingthe column corresponding to the most-significant non-zero bit of theCheckBitMask.